Abstract

Reed Solomon (RS) codes have been widely used in a variety of communication systems. Continual demand for ever higher data rates makes it necessary to devise very high-speed implementations of RS decoders. This eliminates the need of retransmission of messages over a noisy channel First the syndrome unit calculates the syndromes. Then the key equation solver solves the key equation for the error location polynomial. The correction unit calculates the error location and value and then adds the error sequence to the received code word to get the corrected code word. The memory unit is used to store the received code word while the decoder calculates the syndromes and solves the key equation. During the correction stage, the stored code word is read out from the memory and added to the error sequence to get the corrected code word

LANGUAGE USED:

VHDL

TOOLS REQUIRED:

• Simulation: ModelSim XE III 6.4b.
• Synthesis: XiLinx ISE 10.1.

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